SILICON WAFER
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United States of America Patent
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Issued Date -
Sep 26, 2013
app pub date -
Mar 15, 2013
filing date -
Mar 26, 2012
priority date (Note) -
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Abstract
A silicon wafer is provided in which a dislocation is less likely Lo be generated originating from an oxide precipitate in a semiconductor device forming process, and a gettering effect with respect to Cu is increased. A silicon wafer 1 is characterized in that a surface layer portion 1a from a surface to a depth of at least 5 μm has an LSTD density of less than 1.0/cm2, and that in a bulk portion 1b except the surface layer portion 1a, planar oxide precipitates 2a and polyhedral oxide precipitates 2b having a scattered light intensity of 3000 to 5000 a.u., and a density of 1.0×109 to 6.0×109 (particles/cm3) are each intermingled and grown, and a density ratio of the planar oxide precipitate to polyhedral oxide precipitate is represented by (planar oxide precipitate:polyhedral oxide precipitate=X: (100-X), where X is 10 to 40).
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