Semiconductor Device and Method of Forming Duplex Plated Bump-On-Lead Pad Over Substrate for Finer Pitch Between Adjacent Traces
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United States of America Patent
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Issued Date -
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app pub date -
Mar 20, 2012
filing date -
Mar 20, 2012
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A semiconductor device has a substrate. A first conductive layer is formed over the substrate. A duplex plated bump on lead pad is formed over the substrate. An insulating layer is formed over the first conductive layer and the substrate. A portion of the insulating over the duplex plated bump on lead pad is removed using a laser direct ablation process. The insulating layer is a lamination layer. The duplex plated bump on lead pad has a wide bump on lead pad. A semiconductor die is mounted over the substrate. The semiconductor die has a composite conductive interconnect structure. The semiconductor die has a first bump and a second bump with a pitch ranging from 90-150 micrometers between the first bump and the second bump. A duplex plated contact pad is formed on a surface of the substrate opposite the duplex plated bump-on-lead pad.
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International Classification(s)
- 2012 Application Filing Year
- H01L Class
- 20465 Applications Filed
- 18077 Patents Issued To-Date
- 88.34 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 10 Citation Count
- H01L Class
- 4.91 % this patent is cited more than
- 12 Age