Methods and Apparatus for LDMOS Transistors
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United States of America Patent
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Issued Date -
Sep 12, 2013
app pub date -
Apr 24, 2013
filing date -
Jul 18, 2005
priority date (Note) -
Abandoned
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Abstract
An LDMOS transistor includes a gate including a conductive material over an insulator material, a source including a first impurity region and a second impurity region, a third impurity region, and a drain including a fourth impurity region and a fifth impurity region. The first impurity region is of a first type, and the second impurity region is of an opposite second type. The third impurity region extends from the source region under the gate and is of the first type. The fourth impurity region is of the second type, the fifth impurity region is of the second type, and the fourth impurity region impinges the third impurity region.
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