Importance

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Abstract

A process of manufacturing a high electron mobility transistor, comprising: providing an epitaxial substrate comprising a semi-insulating substrate, a buffer layer and a barrier layer sequentially stacked; forming a first and second current conducting electrodes formed on, and in ohmic contact with, the barrier layer; and forming a control gate on, and in Schottky contact with, the barrier layer, between the first and second current conducting electrodes. The control gate is formed on the barrier layer by initially forming a lower portion of the control gate, then performing a thermal stabilization and annealing treatment to remove the damage to the crystal lattice of the surface of the semiconductor introduced by the preceding process steps and stabilize the metal-semiconductor interface of the Schottky junction, and finally forming an upper portion of the control gate on, and in electric contact with, the lower portion of the control gate.

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First Claim