Wafer-to-wafer stack with supporting post

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United States of America Patent

PATENT NO 9111774
APP PUB NO 20130161829A1
SERIAL NO

13774939

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Abstract

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A wafer stack includes: a first wafer having a first substrate and a first device layer having therein at least a chip; a second wafer having a second substrate disposed above the first wafer; and at least a first metal post existing in the first device layer, and arranged between the first and the second substrates, without being electrically connected to the chip.

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Patent Owner(s)

Patent OwnerAddress
INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTECHU-TUNG HSIN-CHU

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chang, Chi-Shih Hsinchu, TW 6 131
Lee, Rong-Shen Hsinchu, TW 16 617
Liau, Shyi-Ching Hsinchu, TW 20 348
Lo, Wei-Chung Hsinchu, TW 26 335
Tain, Ra-Min Hsinchu, TW 95 646

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