METHOD FOR ADJUSTING VOLTAGE CHARACTERISTICS OF SEMICONDUCTOR MEMORY ELEMENT, METHOD FOR ADJUSTING VOLTAGE CHARACTERISTICS OF SEMICONDUCTOR MEMORY DEVICE, CHARGE PUMP AND METHOD FOR ADJUSTING VOLTAGE OF CHARGE PUMP
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United States of America Patent
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Issued Date -
May 9, 2013
app pub date -
May 23, 2011
filing date -
May 24, 2010
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
Voltages are applied to supply voltage application points of memory cells of an SRAM, a semiconductor substrate, a word line and bit lines so that voltage Vdd takes value V1, substrate voltage Vsub becomes 0 V, word line voltage Vw1 takes value V1, bit line voltage Vbll becomes 0 V, and bit line voltage Vblr takes value V1, the voltage difference between the word line and one of the bit lines is forced to be equal to a voltage difference V1h higher than a normal voltage difference V1 and the voltage difference between the word line and the other bit line is forced to be equal the normal voltage difference V1 lower than the voltage V1h to inject electrons into an insulating layer near a diffusion layer connected to an output terminal of an inverter constituting the memory cell. This can improve the operating characteristics of the memory cell.

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Patent Owner(s)
Patent Owner | Address | |
---|---|---|
SEMICONDUCTOR TECHNOLOGY ACADEMIC RESEARCH CENTER | TOKYO 105-0004 |
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Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Honda, Kentaro | Tokyo, JP | 11 | 45 |
Miyaji, Kosuke | Tokyo, JP | 4 | 16 |
Takeuchi, Ken | Tokyo, JP | 169 | 6391 |
Tanakamaru, Shuhei | Tokyo, JP | 12 | 82 |
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