POLYSILICON-INSULATOR-SILICON CAPACITOR IN A SIGE HBT PROCESS AND MANUFACTURING METHOD THEREOF
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United States of America Patent
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Issued Date -
May 9, 2013
app pub date -
Sep 13, 2012
filing date -
Nov 3, 2011
priority date (Note) -
Abandoned
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Abstract
A PIS capacitor in a SiGe HBT process is disclosed, wherein the PIS capacitor includes: a silicon substrate; a P-well and shallow trench isolations formed in the silicon substrate; a P-type heavily doped region formed in an upper portion of the P-well; an oxide layer and a SiGe epitaxial layer formed above the P-type heavily doped region; spacers formed on sidewalls of the oxide layer and the SiGe epitaxial layer; and contact holes for picking up the P-well and the SiGe epitaxial layer and connecting each of the P-well and the SiGe epitaxial layer to a metal wire. A method of manufacturing the PIS capacitor is also disclosed. The PIS capacitor of the present invention is manufactured by using SiGe HBT process, thus providing one more device option for the SiGe HBT process.
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