PACKAGE STRUCTURE AND MANUFACTURING METHOD FOR THE SAME
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United States of America Patent
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Issued Date -
May 2, 2013
app pub date -
Jan 30, 2012
filing date -
Nov 1, 2011
priority date (Note) -
Abandoned
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Abstract
A package structure and a manufacturing method for the same are provided. The package structure includes a chip, a substrate and at least one adhesive layer. The chip has at least one electrode portion. The substrate has at least one circuit portion. The adhesive layer is disposed between the electrode portion and the circuit portion to form an electrical connection therebetween. The adhesive layer is a material, which comprises a metal compound, with a Negative Coefficient of Thermal Expansion (Negative CTE). Because of the material with a Negative CTE, the alignment shift can be avoided after the chip and the substrate are adhered together.
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