DEAD-TIME COMPENSATION ALGORITHM FOR 3-PHASE INVERTER USING SVPWM

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United States of America Patent

APP PUB NO 20130088905A1
SERIAL NO

13295146

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Abstract

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Disclosed is a dead-time compensation method of a 3-phase inverter using an SVPWM scheme. The dead-time compensation method includes generating a switching signal having dead-time with respect to the power semiconductor switches of the upper and lower arms in order to obtain a predetermined output through the SVPWM scheme, detecting medium phase current from each phase current output through the switching signal, determining polarity of the medium phase current, and generating a switching signal by calculating switching time in order to compensate for time to apply effective voltage according to the polarity of the medium phase current. Through the dead-time compensation method, the distortion of the output voltage and the reduction of voltage having a fundamental wave in the output voltage, which are caused by the dead-time, are minimized through the switching of compensating for the time to apply effective voltage based on the polarity of the load current.

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Patent Owner(s)

Patent OwnerAddress
KYUNGSUNG UNIVERSITY INDUSTRY COOPERATION FOUNDATION309 SUYEONG-RO NAM-GU BUSAN 48434
AUTO POWER CO LTD409 RIMT PUSAN NATIONAL UNIVERSITY SAN 30 JANGJEON-DONG GEUMJEONG-GU BUSAN 607-788

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
KIM, Hong Min Tongyeong-si, KR 35 203
LEE, Dong Hee Busan, KR 120 569

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