METHOD FOR PROVIDING A SYSTEM ON CHIP WITH POWER AND BODY BIAS VOLTAGES

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United States of America Patent

SERIAL NO

13669259

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Abstract

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Embodiments described in the present disclosure relate to a method for providing power for an integrated system, including acts of: providing the system with power, ground and body bias voltages, the body bias voltages comprising a body bias voltage of p-channel MOS transistors, greater or lower than the supply voltage, and a body bias voltage of n-channel MOS transistors, lower or greater than the ground voltage, selecting by means of the system out of the voltages provided, depending on whether a processing unit of the system is in a period of activity or inactivity, voltages to be supplied to bias the bodies of the MOS transistors of the processing unit, and providing the bodies of the MOS transistors of the processing unit with the voltages selected.

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Patent Owner(s)

Patent OwnerAddress
STMICROELECTRONICS SA29 BOULEVARD ROMAIN ROLLAND MONTROUGE 92120
STERICSSON SA39 CHEMIN DU CHAMP-DES-FILLES PLAN-LES-OUTES GENEVA 1228

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Blisson, Fabrice Grenoble, FR 8 35
Hasbani, Frederic Hurtieres, FR 6 7
Jacquet, David Vaulnaveys le haut, FR 7 22
Urard, Pascal Theys, FR 37 201

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