MANUFACTURE METHOD OF BUILDUP CIRCUIT BOARD
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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N/A
Issued Date -
N/A
app pub date -
Nov 1, 2012
filing date -
Sep 19, 2007
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A manufacturing method of a buildup circuit board includes forming a wiring layer on an organic polymer insulating layer by copper electroplating and building up other organic polymer insulating layer on the wiring layer, wherein in a final step of the copper electroplating, a surface of the wiring layer is roughened by copper electroplating and the organic polymer insulating layer is formed directly on the roughened surface of the wiring layer. According to the invention, a specific etching step that is essential for enhancing adhesion between the organic polymer insulating layer and the wiring layer can be omitted and no expensive etching apparatus is necessary, thus being good in economy. In addition, if various types of copper sulfate plating baths containing different types of additives used for via fill plating are used as they are, irregularities on the surface can be made in various forms and roughnesses. Thus, it is necessary to select a specific type of etching solution depending on film characteristics ascribed to types of additives. Moreover, it is easy to form surface irregularities in conformity with the type of material and physical properties of the organic polymer insulating layer being built up.
First Claim
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Family

- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
---|---|---|
C UYEMURA AND CO LTD | 18 DOSHO-MACHI 3-CHOME HIGASHI-KU OSAKA-SHI OSAKA |
International Classification(s)

- 2012 Application Filing Year
- H05K Class
- 4940 Applications Filed
- 3397 Patents Issued To-Date
- 68.77 % Issued To-Date
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
HOTTA, Teruyuki | Osaka, JP | 41 | 546 |
# of filed Patents : 41 Total Citations : 546 | |||
ISONO, Toshihisa | Osaka, JP | 11 | 95 |
# of filed Patents : 11 Total Citations : 95 | |||
KAWASE, Tomohiro | Osaka, JP | 89 | 1012 |
# of filed Patents : 89 Total Citations : 1012 | |||
OMURA, Naoyuki | Osaka, JP | 14 | 100 |
# of filed Patents : 14 Total Citations : 100 | |||
TACHIBANA, Shinji | Osaka, JP | 24 | 153 |
# of filed Patents : 24 Total Citations : 153 |
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Patent Citation Ranking
- 1 Citation Count
- H05K Class
- 2.95 % this patent is cited more than
- 12 Age
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Maintenance Fees
Fee | Large entity fee | small entity fee | micro entity fee | due date |
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Fee | Large entity fee | small entity fee | micro entity fee |
---|---|---|---|
Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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