CALIBRATION SCHEME FOR ANALOG-TO-DIGITAL CONVERTER
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United States of America Patent
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Issued Date -
Feb 28, 2013
app pub date -
Aug 24, 2010
filing date -
Oct 29, 2009
priority date (Note) -
Abandoned
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Abstract
An analog-to-digital converter (ADC) apparatus comprising an input signal connector, an output signal port, two or more sub-ADCs, a digital signal processing (DSP) block, wherein the result from each sub-ADC is used by the DSP block to output data with increased performance and perform calibration of each sub-ADC independently while the other sub-ADCs and the DSP block operate and output data normally.
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