SEMICONDUCTOR PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Feb 28, 2013
app pub date -
Feb 6, 2012
filing date -
Aug 25, 2011
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A method of manufacturing a semiconductor package structure is provided. A chip is provided. An active surface of the chip is disposed on a carrier. A molding compound is formed on the carrier with a metal layer disposed thereon. The metal layer has an upper and lower surface, multiple cavities formed on the upper surface and multiple protrusions formed on the lower surface and corresponding to the cavities. The protrusions are embedded in the molding compound. The metal layer is patterned to form multiple pads on a portion of the molding compound. The carrier and the molding compound are separated. Multiple through holes are formed on the molding compound exposing the protrusions. A redistribution layer is formed on the molding compound and the active surface of the chip. Multiple solder balls are formed on the redistribution layer. A portion of the solder balls are correspondingly disposed to the pads.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully