POOLED-RESOURCE ARCHITECTURE WITH ASYNCHRONOUS PACKET-BASED COMMUNICATION
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United States of America Patent
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N/A
Issued Date -
Feb 14, 2013
app pub date -
Aug 12, 2011
filing date -
Aug 12, 2011
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A chip includes a pool of blocks. Each block is adapted to implement a communication protocol. A cross-connect configurably connects between the blocks. A configured connection through the cross-connect between a sending block and a receiving block includes a lane with a toggle line and multiple data lines. The receiving block uses the toggle line to determine when valid data is on the data lines. The sending block and receiving block are on different clock domains.
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