SEMICONDUCTOR PACKAGE WITH INTERPOSER BLOCK THEREIN
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United States of America Patent
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Issued Date -
Nov 15, 2012
app pub date -
Apr 26, 2012
filing date -
May 13, 2011
priority date (Note) -
Abandoned
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Abstract
A semiconductor package substrate is provided. The package substrate includes a mold base and an interposer block embedded in the mold base, said interposer block having a plurality of vertical conductive lines therein. A metallization layer is formed on the surface of the interposer block or the mold base, said metallization layer being electrically connected to at least one of the vertical conductive lines. A semiconductor chip may be mounted on or embedded in the mold base.
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