MOLD ARRAY PROCESS METHOD TO PREVENT EXPOSURE OF SUBSTRATE PERIPHERIES

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United States of America Patent

APP PUB NO 20120264257A1
SERIAL NO

13086851

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Abstract

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Disclosed is a mold array process (MAP) method to prevent exposure of peripheries of substrate units where the major characteristic is to implement two kinds of encapsulating materials in the MAP method in mass production. A first encapsulating material for encapsulating chips is formed on a substrate strip by molding to continuously encapsulate the substrate units and the scribe lines between adjacent substrate units. Prior to forming a second encapsulating material, a plurality of cut grooves are formed along the scribing lines by pre-cutting processes to penetrate through the substrate strip but without penetrating through the first encapsulating material and have such a width that a plurality of peripheries of the substrate units are exposed outside the scribing lines. Then, the second encapsulating material is filled into the cut grooves. Accordingly, the peripheries of the substrate units are still encapsulated with the remains of the second encapsulating material after singulation processes where the substrate units are singulated into individual semiconductor packages to prevent exposure of the peripheries of the substrate units.

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Patent Owner(s)

Patent OwnerAddress
WALTON ADVANCED ENGINEERING INC18 NORTH FIRST ROAD K E P Z KAOHSIUNG R O C

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Yung-Hsiang Kaohsiung, TW 186 2102
Chiu, Wen-Chun Kaohsiung, TW 9 56
Lee, Kuo-Yuan Kaohsiung, TW 13 97

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