ECLIPSE DETECTION USING DOUBLE RESET SAMPLING FOR COLUMN PARALLEL ADC
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United States of America Patent
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Issued Date -
Oct 4, 2012
app pub date -
Apr 28, 2011
filing date -
Mar 28, 2011
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
An imager includes a column line connected to a pixel array for providing a pixel output signal. The pixel output signal is sampled during reset and readout phases. An analog-to-digital converter (ADC), which is coupled to the column line, samples the pixel output signal and provides a digital output signal. The ADC is configured to sample the pixel output signal twice, during the reset phase, in order to detect eclipse in the pixel output signal. The ADC includes a comparator, sequentially operated by a reset control, for comparing a first pixel output voltage and a second pixel output voltage, respectively, during the reset phase. The comparator is configured to provide an output bit indicating detection of an eclipse, based on a difference between the first and second pixel output voltages.
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