HEAT CONDUCTION FOR CHIP STACKS AND 3-D CIRCUITS

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20120248627A1
SERIAL NO

13525523

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A semiconductor device assembly and method can include a single semiconductor layer or stacked semiconductor layers, for example semiconductor wafers or wafer sections (semiconductor dice). On each semiconductor layer, a diamond layer formed therethrough can aid in the routing and dissipation of heat. The diamond layer can include a first portion on the back of the semiconductor layer, and one or more second portions which extend vertically into the semiconductor layer, for example completely through the semiconductor layer. Thermal contact can then be made to the diamond layer to conduct heat away from the one or more semiconductor layers. A conductive via can be formed through the diamond layers to provide signal routing and heat dissipation capabilities.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
INTERSIL AMERICAS INC1001 MURPHY RANCH ROAD MILPITAS CA 95035

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gaul, Stephen Joseph Melbourne Village, US 24 1451
Hebert, Francois San Mateo, US 187 3281

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation