CORELESS LAYER LAMINATED CHIP CARRIER HAVING SYSTEM IN PACKAGE STRUCTURE
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United States of America Patent
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Issued Date -
Oct 4, 2012
app pub date -
Mar 28, 2011
filing date -
Mar 28, 2011
priority date (Note) -
Abandoned
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Abstract
A substrate for use in a laminated chip carrier (LCC) and a system in package (SiP) device having a coreless buildup layer and at least one metal and at least one dielectric layer. The coreless buildup dielectric layers can include thermoset and thermoplastic resin.
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