NEIGHBORHOOD OPERATIONS FOR PARALLEL PROCESSING
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United States of America Patent
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Issued Date -
Sep 27, 2012
app pub date -
Oct 6, 2010
filing date -
Oct 21, 2009
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A memory device includes a plurality of storage units in which to store data of a bank, wherein the data has a logical order prior to storage and a physical order different than the logical order within the plurality of storage units and a within-device reordering unit to reorder the data of a bank into the logical order prior to performing on-chip processing. In another embodiment, the memory device includes an external device interface connectable to an external device communicating with the memory device, an internal processing element to process data stored on the device and multiple banks of storage. Each bank includes a plurality of storage units and each storage unit has two ports, an external port connectable to the external device interface and an internal port connected to the internal processing element.
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