SEMICONDUCTOR PACKAGE HAVING INTERCONNECTION OF DUAL PARALLEL WIRES
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Sep 13, 2012
app pub date -
Mar 7, 2011
filing date -
Mar 7, 2011
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A semiconductor package having dual parallel wires is disclosed. A chip is attached on a substrate where the chip and the substrate are electrically connected by a bonding wire. The bonding wire consists of a first metal wire, a second metal wire, and an insulating body where the insulating body encapsulates the first and the second metal wires to make both metal wires parallel to each other. The insulating body forms a constant gap between the first and the second metal wires so that both metal wires do not contact to each other. Therefore, the electrical performance of the package can greatly be enhanced with the same productivity.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully