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United States of America Patent

APP PUB NO 20120220101A1
SERIAL NO

13219668

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Abstract

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The invention provides advances in the arts with useful and novel methods for assembling multi-layer semiconductor structures having one or more internal conductive layers. The disclosed structures provide advantages in terms of resistance to Single Event Effects (SEE) particularly useful in electronics designed for radiation hardness. Disclosed methods include steps for providing two semiconductor layers, each having a conductive surface, and bonding them together with their conductive surfaces adjoining in order to form an internal conductive layer within a completed multi-layer structure. The conductive surfaces may include metals selected for their superior conductivity, refractory metals, selected primarily for their heat-resistance, or conductive dopants. In alternative embodiments, vertical interconnects are also included.

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Patent Owner(s)

Patent OwnerAddress
TRIUNE IP LLCRICHARDSON TX

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Wayne Plano, US 71 1082
Krick, John Dallas, US 1 3
Teggatz, Ross McKinney, US 46 847

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