PIPELINE FLUSH FOR PROCESSOR THAT MAY EXECUTE INSTRUCTIONS OUT OF ORDER
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United States of America Patent
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Issued Date -
Jul 5, 2012
app pub date -
Dec 30, 2011
filing date -
Dec 30, 2010
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Abstract
An embodiment of an instruction pipeline includes first and second sections. The first section is operable to provide first and second ordered instructions, and the second section is operable, in response to the second instruction, to read first data from a data-storage location, is operable, in response to the first instruction, to write second data to the data-storage location after reading the first data, and is operable, in response to the writing the second data after reading the first data, to cause the flushing of a some, but not all, of the pipeline. Such an instruction pipeline may reduce the processing time lost and the energy expended due to a pipeline flush by flushing only a portion of the pipeline instead of flushing the entire pipeline.
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