MASK REVISION RECORDING CIRCUIT FOR A MEMORY CIRCUIT
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United States of America Patent
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Issued Date -
Jun 28, 2012
app pub date -
Mar 16, 2011
filing date -
Dec 22, 2010
priority date (Note) -
Abandoned
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Abstract
A mask revision recording circuit for a memory circuit includes a mask recording module and a reading unit. The mask recording module includes a plurality of mask recording units, and a layout of each mask recording unit corresponds to all masks of a layout of the memory circuit. The reading unit is coupled to the mask recording module for reading information of the mask recording module corresponding to a mask revision of the memory circuit according to a clock and an enable signal.
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