Method and apparatus for processing financial information at hardware speeds using FPGA devices
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United States of America Patent
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Feb 2, 2021
Grant Date -
May 24, 2012
app pub date -
Nov 21, 2011
filing date -
May 21, 2002
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Abstract
A method and apparatus use hardware logic deployed on a reconfigurable logic device to process a stream of financial information at hardware speeds. The hardware logic can be configured to perform data reduction operations on the financial information stream. Examples of such data reductions operations include data processing operations to compute a latest stock price, a minimum stock price, and a maximum stock price.
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