FAST QUANTIZER APPARATUS AND METHOD
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United States of America Patent
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Issued Date -
May 24, 2012
app pub date -
Nov 17, 2011
filing date -
Nov 18, 2010
priority date (Note) -
Abandoned
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Abstract
An apparatus and method for a fast quantizer comparator comprising three stages: a preamplifier stage, a regeneration latch stage, and a data latch stage. Time delay is reduced by changing the initial voltages of the regeneration latch outputs. The current source is provided at the tail of the comparator, enabling time delay optimization. When the PMOS equalization switch turns off, it makes the clock signal feedthrough and provides charge injection into the outputs. Because of these charges, the time delay of the comparator is variable. Only a very low current sets the output voltages because the resetting time is longer than the comparison time.
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