SEMICONDUCTOR CAPACITOR, ONE TIME PROGRAMMABLE MEMORY CELL AND FABRICATING METHOD AND OPERATING METHOD THEREOF
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United States of America Patent
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Issued Date -
Apr 26, 2012
app pub date -
Dec 28, 2011
filing date -
Jul 18, 2006
priority date (Note) -
Abandoned
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Abstract
A one time programmable memory cell having a gate, a gate dielectric layer, a source region, a drain region, a capacitor dielectric layer and a conductive plug is provided herein. The gate dielectric layer is disposed on a substrate. The gate is disposed on the gate dielectric layer. The source region and the drain region are disposed in the substrate at the sides of the gate, respectively. The capacitor dielectric layer is disposed on the source region. The capacitor dielectric layer is a resistive protection oxide layer or a self-aligned silicide block layer. The conductive plug is disposed on the capacitor dielectric layer. The conductive plug is served as a first electrode of a capacitor and the source region is served as a second electrode of the capacitor. The one time programmable memory (OTP) cell is programmed by making the capacitor dielectric layer breakdown.
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