STI-ALIGNED LDMOS DRIFT IMPLANT TO ENHANCE MANUFACTURABILITY WHILE OPTIMIZING RDSON AND SAFE OPERATING AREA
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United States of America Patent
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Issued Date -
Apr 19, 2012
app pub date -
Oct 14, 2010
filing date -
Oct 14, 2010
priority date (Note) -
Abandoned
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Abstract
A method is provided that utilizes the shallow trench isolation (STI) process to incorporate a self-aligned drift implant into the extrinsic drain of a laterally diffused MOS (LDMOS) device. Since the location of the implant edge with respect to the edge of the STI is determined by the shallow trench etch, the edge location is extremely consistent and can significantly reduce the standard deviation of device parameters dependent upon the location of the implant. This, in turn, allows for a more compact device design with optimized performance.
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