Semiconductor device
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United States of America Patent
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Jun 4, 2013
Grant Date -
Mar 29, 2012
app pub date -
Dec 6, 2011
filing date -
Dec 27, 2007
priority date (Note) -
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Abstract
A phase change memory capable of highly reliable operations is provided. A semiconductor device has a memory array having a structure in which memory cells are stacked including memory layers using a chalcogenide material and diodes, and initialization conditions and write conditions are changed according to the layer in which a selected memory cell is positioned. The initialization conditions and write conditions (herein, reset conditions) are changed according to the operation by selecting a current mirror circuit according to the operation and by a control mechanism of a reset current in a voltage select circuit and the current mirror circuit.
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