Method for Control of Solder Collapse in Stacked Microelectronic Structure

United States of America Patent

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Issued Date
Mar 22, 2012
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Aug 15, 2011
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Sep 17, 2010

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A process and product made from the process is disclosed to minimize solder collapse during solder reflow.

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Inventor Name	Address	# of filed Patents	Total Citations
Bindrup, Randy	Trabucco Canyon, US	9	56
Boyd, W Eric	La Mesa, US	28	755
Yamaguchi, James	Laguna Niguel, US	16	153

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Method for Control of Solder Collapse in Stacked Microelectronic Structure

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United States of America Patent

13209933

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