INTEGRATED CIRCUIT ESD PROTECTION USING SUBSTRATE IN ESD CURRENT PATH

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United States of America Patent

APP PUB NO 20120069478A1
SERIAL NO

12884423

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method for conducting ESD current through an integrated circuit formed on a semiconductor substrate includes sensing an ESD potential between a first I/O pad and a second I/O pad of the integrated circuit, providing a current path for ESD current from the first I/O pad of the integrated circuit to a portion of a first metal line in the integrated circuit, providing a current path for ESD current from the portion of the first metal line to the substrate, and providing a current path for ESD current from the substrate to the second I/O pad of the integrated circuit.

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Patent Owner(s)

Patent OwnerAddress
FOVEON INC3565 MONROE STREET SANTA CLARA CA 95051

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Caplan, Randy Jacob Hoschton, US 1 8
Cole, Andrew Sunnyvale, US 33 649

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