Phase adjustment circuit, receiving apparatus and communication system
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United States of America Patent
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Issued Date -
Mar 15, 2012
app pub date -
Jul 15, 2011
filing date -
Sep 15, 2010
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A phase adjustment circuit includes: a serial-to-parallel conversion section configured to convert serial data including a synchronization pattern inserted into a predetermined position into parallel data in response to a clock; a synchronization-pattern-position detection section configured to detect the position of the synchronization pattern in the parallel data generated by the serial-to-parallel conversion section; and an adjustment section configured to adjust the phases of the parallel data and the clock to conform to a position detected by the synchronization-pattern-position detection section as the position of the synchronization pattern in accordance with information on the position of the synchronization pattern.
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