Power On/Reset Circuit and Method of Controlling On/Reset Status of Digital Circuit thereof
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United States of America Patent
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Issued Date -
Mar 1, 2012
app pub date -
Mar 15, 2011
filing date -
Aug 31, 2010
priority date (Note) -
Abandoned
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Abstract
A power on/reset circuit includes a voltage following module, an inverse amplifying module, and at least one first transistor connected in series in a stack. The voltage following module generates a first analog signal, whose voltage level follows a voltage level of a first DC voltage source. The inverse amplifying module logically reverses a voltage level of the first analog signal so as to generate a second analog signal. The at least one first transistor adjusts the second analog signal, so that a voltage level of a power on/reset signal controlled by the second analog signal is qualified to precisely trigger a rear digital circuit.
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