METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE, METHOD FOR ENCAPSULATING SEMICONDUCTOR, AND SOLVENT-BORNE SEMICONDUCTOR ENCAPSULATING EPOXY RESIN COMPOSITION
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United States of America Patent
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Issued Date -
Feb 16, 2012
app pub date -
Jan 8, 2010
filing date -
Jan 9, 2009
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Abandoned
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Abstract
Disclosed is a novel method for manufacturing a semiconductor package, which can suppress the formation of voids in an encapsulating resin. Specifically disclosed is a method for manufacturing a semiconductor package, which comprises: (1) a step wherein a first member, which is selected from a group consisting of semiconductor chips and circuit boards, is coated with solvent borne semiconductor encapsulating epoxy resin composition that essentially contains (A) an epoxy resin, (B) a phenol novolac resin in such an amount that the mole number of phenolic hydroxyl groups is 0.8-1.2 times the mole number of epoxy groups in the component (A), (C) a curing accelerator and (D) a solvent: (2) a step wherein the coated composition is dried by volatilizing the solvent therefrom; and (3) a step wherein the first member and a second member, which is selected from a group consisting of semiconductor chips and circuit boards to form, together with the first member, a semiconductor chip/circuit board pair or a semiconductor chip/semiconductor chip pair, are thermally compression bonded with each other with the coated and dried composition interposed therebetween.
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