CONDUCTIVE STRUCTURE FOR A SEMICONDUCTOR INTEGRATED CIRCUIT

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United States of America Patent

SERIAL NO

13248683

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A conductive structure for a semiconductor integrated circuit is provided. The semiconductor integrated circuit has a substrate, a plurality of pads and a passivation layer. The pads are disposed on the substrate. The passivation layer extends over and covers a part of the substrate and a part of around each of the pads to define a plurality of openings, in which the conductive structure electrically connects to a corresponding pad of the pads through a corresponding opening of the openings. The conductive structure includes a buffering layer, an under bump metallurgy (UBM) layer and a bump. The buffering layer is formed on the passivation layer without fully blocking the corresponding opening. The UBM layer is substantially formed in the corresponding opening and electrically connects to the corresponding pad. Additionally, the UBM layer, formed under the bump, continuously extends over and covers a peripheral portion of the buffering layer.

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Patent Owner(s)

Patent OwnerAddress
CHIPMOS TECHNOLOGIES INCHSINCHU

International Classification(s)

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  • 2011 Application Filing Year
  • H01L Class
  • 19146 Applications Filed
  • 15997 Patents Issued To-Date
  • 83.56 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances20112012201320142015201620172018201920202021202220230255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chyi, Jhong Bang Hsinchu, TW 3 12
Shen, Geng-Shin Hsinchu, TW 73 523

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Patent Citation Ranking

  • 7 Citation Count
  • H01L Class
  • 3.37 % this patent is cited more than
  • 13 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges234326114937383772491639770504017801 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +020040060080010001200140016001800200022002400260028003000320034003600

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