Hybrid system combining TLM simulators and HW accelerators
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United States of America Patent
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Issued Date -
Dec 15, 2011
app pub date -
Jun 10, 2010
filing date -
Jun 10, 2010
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Abandoned
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Abstract
A hybrid system is combining transaction level modeling (TLM) simulators and hardware accelerators so that new system-on chip (SoC) designs are integrated in a virtual platform (VP) to run TLM simulation and existent semiconductor intellectual properties (IP) are added to physical platform (PP) to run hardware accelerator. A new circuit design with TLM is easier to be performed than with register transfer language (RTL) and it is integrated in a virtual platform and existent IP doesn't have to be redesigned to be integrated in a virtual platform.
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