THROUGH-SILICON VIAS WITH LOW PARASITIC CAPACITANCE
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United States of America Patent
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Issued Date -
Dec 1, 2011
app pub date -
May 25, 2010
filing date -
May 25, 2010
priority date (Note) -
Abandoned
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Abstract
A device has a silicon substrate with a via extending from a first surface of the silicon substrate having a conductor portion. A first dielectric portion surrounds the conductor portion. A second dielectric portion is disposed between a first silicon portion and the silicon substrate.
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