EPITAXIAL WAFER HAVING A HEAVILY DOPED SUBSTRATE AND PROCESS FOR THE PREPARATION THEREOF
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United States of America Patent
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N/A
Issued Date -
N/A
app pub date -
Jun 21, 2011
filing date -
Jun 29, 2007
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
This invention generally relates to a process for suppressing silicon self-interstitial diffusion near the substrate/epitaxial layer interface of an epitaxial silicon wafer having a heavily doped silicon substrate and a lightly doped silicon epitaxial layer. Interstitial diffusion into the epitaxial layer is suppressed by a silicon self-interstitial sink layer comprising dislocation loops.
First Claim
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