Methods of Manufacturing Stacked Semiconductor Devices

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United States of America Patent

APP PUB NO 20110237055A1
SERIAL NO

13053291

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Abstract

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A stacked semiconductor device that is reliable by forming an insulating layer on a lower memory layer and by forming a single crystalline semiconductor in portions of the insulating layer. A method of manufacturing the stacked semiconductor device, including: providing a lower memory layer including a plurality of lower memory structures; forming an insulating layer on the lower memory layer; forming trenches by removing portions of the insulating layer; forming a preparatory semiconductor layer for filling the trenches; and forming a single crystalline semiconductor layer by phase-changing the preparatory semiconductor layer.

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Patent Owner(s)

Patent OwnerAddress
SAMSUNG ELECTRONICS CO LTD129 SAMSUNG-RO YEONGTONG-GU SUWON-SI GYEONGGI-DO 16677 REPUBLIC OF KOREA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Baik, Seung-Jae Hwaseong-si, KR 21 232
Choi, Si-Young Seongnam-si, KR 112 1725
Han, Jeong Hee Hwaseong-si, KR 9 53
Hwang, Ki-Hyun Seongnam-si, KR 106 2902
Lee, Myoung-Bum Seoul, KR 35 404
Son, Yong-hoon Yongin-si, KR 124 3259

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