Method of forming and patterning conformal insulation layer in vias and etched structures

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United States of America Patent

APP PUB NO 20110207323A1
SERIAL NO

12712339

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Abstract

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Vias are formed in a substrate using an etch process that forms an undercut profile below the mask layer. The vias are coated with a conformal insulating layer and an etch process is applied to the structures to remove the insulating layer from horizontal surfaces while leaving the insulating layers on the vertical sidewalls of the vias. The top regions of the vias are protected during the etchback process by the undercut hardmask.

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Patent Owner(s)

Patent OwnerAddress
SPTS TECHNOLOGIES LIMITEDCOED RHEDYN RINGLAND WAY NEWPORT NP18 2TA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ditizio, Robert Petaluma, US 5 89

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