ETHERENT PHYSICAL LAYER TEST SYSTEM AND METHOD

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United States of America Patent

APP PUB NO 20110158108A1
SERIAL NO

12768959

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Abstract

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An Ethernet physical layer test system and method, wherein a signal pattern generator is utilized to generate repeatedly a signal pattern frame required by the test items of the Ethernet physical layer according to a transmission procedure of a medium access controller; meanwhile, the signal pattern generator generates a control signal for switching a multiplexer, so as to control the transmission of a signal pattern frame. The Ethernet physical layer receives the signal pattern frame and outputs a test packet to a measurement instrument via a twisted-pair, for testing and analyzing quality of signals output by the Ethernet physical layer. Through the application of this Ethernet physical layer test system and method, the time required for testing the Ethernet physical layer can be effectively reduced, thus simplifying the complexity of an algorithm in testing the Ethernet physical layer.

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Patent Owner(s)

Patent OwnerAddress
ASIX ELECTRONICS CORPORATION4F NO 8 HSIN ANN RD HSINCHU SCIENCE PARK HSIN CHU 300

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
CHAN, Yung-Ta Hsinchu City, TW 5 26
Chang, Che-Wei Taipei City, TW 202 784
Chen, Chien-Liang Banqiao City, TW 87 825
Chu, Chun-Chi Jhubei City, TW 4 22
Hung, Wei-Cheng Bade City, TW 13 33
Hwang, Shih-Ming Taipei City, TW 46 1368

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