Method For Duplexing a Clock Board

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20110096700A1
SERIAL NO

10545532

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Abstract

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A method provides a technique to implement a circuit for duplexing a clock board that is applicable to all circuit elements within a base station which is synchronized by using a clock. More particularly, the method duplexes a clock board which is embodied to supply a stable clock in a CDMA (code division multiple access) System in such a manner that in case an active board is mounted/dismounted or its hardware is reset, a protection circuit logic is implemented for a board in standby mode (“a standby board”) to receive information of an Opponent board. This is so that a clock break during changing the board can be prevented by using the previously received information and the traditional complicated hardware circuits can be simplified by employing an EPLD (electrically programmable logic device).

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Patent Owner(s)

Patent OwnerAddress
UTSTARCOM INC1275 HARBOR BAY PARKWAY ALAMEDA CA 94502

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bae, Eun Hae Seoul, KR 2 6

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