FREQUENCY MEASUREMENT CIRCUIT AND PLL SYNTHESIZER PROVIDED THEREWITH

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United States of America Patent

APP PUB NO 20110074514A1
SERIAL NO

12886484

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Abstract

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A frequency measurement circuit includes: a first counter that counts a number of edges of a clock signal; a counter latch circuit that stores a first count value of the first counter in response to a reference edge corresponding to a reference clock; a first delay circuit that includes a plurality of first unit delay circuits coupled in series and receives the clock signal; a plurality of first delay latch circuits that latch a respective output among the plurality of first unit delay circuits; a first edge detection circuit that detects the edge in the first delay circuit based on the outputs of the plurality of first delay latch circuits; and a first calculator that calculates a cycle or a frequency of the clock signal based on the first count value between two reference edges and position information corresponding to a edge detected between the two reference edges.

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Patent Owner(s)

Patent OwnerAddress
FUJITSU SEMICONDUCTOR LIMITED2-100-45 SHIN-YOKOHAMA KOHOKU-KU YOKOHAMA-SHI KANAGAWA 222-0033

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
MARUTANI, Masazumi Yokohama, JP 12 94

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