SEMICONDUCTOR ELEMENT, METHOD OF MANUFACTURING FINE STRUCTURE ARRANGING SUBSTRATE, AND DISPLAY ELEMENT

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United States of America Patent

APP PUB NO 20110058126A1
SERIAL NO

12867725

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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With reference to a direction perpendicular to a direction of forming electrodes to which a voltage can be applied, fine structures are each arranged within ±5 degrees at a substantially even interval, and a semiconductor element is formed by using the fine structures. On an insulating substrate, at least two electrodes are arranged at a predetermined interval, and there are formed one or more fine structure arranging regions, each of which is formed by a unit of the two electrodes. A semiconductor element electrode is made in contact with the plurality of the fine structures, each having two ends in contact with the two electrodes and a length in a longitudinal direction of a nano order to a micron order, and arranged within ±5 degrees with reference to the direction perpendicular to the direction of forming the electrodes.

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Patent Owner(s)

Patent OwnerAddress
NANOSYS INC233 S HILLVIEW DRIVE MILPITAS CA 95035
SHARP KABUSHIKI KAISHA1 TAKUMI-CHO SAKAI-KU SAKAI CITY OSAKA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Iwata, Hiroshi Osaka-shi, JP 354 5885
Naitou, Ai Osaka-shi, JP 1 13
Nakajima, Yoshiharu Osaka-shi, JP 141 1690
Negishi, Tetsu Osaka-shi, JP 17 597
Okada, Yasunobu Osaka-shi, JP 6 120
Shibata, Akihide Osaka-shi, JP 109 1758
Takafuji, Yutaka Osaka-shi, JP 108 4765

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