STANDBY POWER REDUCTION METHOD AND APPARATUS FOR SWITCHING POWER APPLICATIONS
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United States of America Patent
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Issued Date -
Mar 3, 2011
app pub date -
Sep 3, 2009
filing date -
Sep 3, 2009
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Abstract
The present invention discloses a standby power reduction method and apparatus for switching power applications, the method comprising the steps of: performing a hysteresis comparison on a supply voltage to generate a selecting signal having a first state and a second state, wherein the hysteresis comparison has a high threshold voltage compared to the supply voltage when the selecting signal is at the first state, and the hysteresis comparison has a low threshold voltage compared to the supply voltage when the selecting signal is at the second state; and determining a UVLO_ON voltage according to the selecting signal, wherein the UVLO_ON voltage is equal to a first level when the selecting signal is at the first state, and the UVLO_ON voltage is equal to a second level when the selecting signal is at the second state.
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