System and Method for Reading Memory
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Jan 20, 2011
app pub date -
Jul 14, 2009
filing date -
Jul 14, 2009
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A novel memory reading circuit includes a bit line for transmitting data bits within the memory, a plurality of storage elements for storing bits of data, and a precharge circuit coupled to the bit line for charging the bit line when the precharge circuit is in a charging state, the precharge circuit being operative to remain in the charging state at time when the storage elements assert the stored bits of data on the bit line. The memory may be a single-ended, static random access memory (“SRAM”). The SRAM circuits of the invention may be incorporated into each of a plurality of individual computers arrayed on a single die.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully