Semiconductor storage device and refresh control method thereof
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United States of America Patent
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Issued Date -
Jan 13, 2011
app pub date -
Jun 29, 2010
filing date -
Jul 10, 2009
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
In a large capacity semiconductor storage device having a multi-bank configuration, it is desired to reduce a peak current of one refresh operation, to avoid an interference between adjacent banks, and to prevent a data breaking of a memory cell caused by a lack of a data hold time. A semiconductor storage device includes: a memory cell array part including a plurality of banks; a refresh control circuit configured to output a refresh timing control signal periodically; and an access control circuit configured to perform a refresh operation on a group of banks which are not adjacent to one another in accordance with a preset combination of banks which are simultaneously activated and a preset activating order when the refresh timing control signal is supplied.
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