METHODS AND STRUCTURES FOR A VERTICAL PILLAR INTERCONNECT

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United States of America Patent

APP PUB NO 20110003470A1
SERIAL NO

12828003

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Abstract

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In wafer-level chip-scale packaging and flip-chip packaging and assemblies, a solder cap is formed on a vertical pillar. In one embodiment, the vertical pillar overlies a semiconductor substrate. A solder paste, which may be doped with at least one trace element, is applied on a top surface of the pillar structure. A reflow process is performed after applying the solder paste to provide the solder cap.

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Patent Owner(s)

Patent OwnerAddress
FLIPCHIP INTERNATIONAL LLC3701 E UNIVERSITY DR PHOENIX AS 85034

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Burgess, Guy F Phoenix, US 9 65
Curtis, Anthony Phoenix, US 7 108
Johnson, Michael E Tempe, US 53 1381
Stout, Gene Phoenix, US 2 24
Tessier, Theodore G Phoenix, US 12 536

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