Ethernet Physical Layer Repeater
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United States of America Patent
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Issued Date -
Nov 25, 2010
app pub date -
May 21, 2009
filing date -
May 21, 2009
priority date (Note) -
Abandoned
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Abstract
An Ethernet repeater system has a plurality of identical repeaters which add substantially no delay. Each repeater has at least a first port and a second port connected to a medium, and a third port connected to a slave processor or a master processor. The master processor controls all communications on the medium. A receive multiplexer always applies data on the medium to the processor in the event the data is destined for the processor. A first transmit multiplexer has inputs connected to the second port and the processor, and an output connected to the first port. A second transmit multiplexer has inputs connected to the first port and the processor, and an output connected to the second port. The first and second transmit multiplexers act as a bridge between the first and second ports to pass through data without any variable latency since the data does not have to be buffered.
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