Importance

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Abstract

A circuit for a flat panel display includes an image storage block, a display and timing controller block, an image pixel matrix containing a multitude of row and column arranged pixel elements, also one or more controlled row and column driver blocks, and a pixel display operation employing the extended multi line addressing (XMLA) operation. That XMLA operation comprises a decomposition of image data by analyzing image data from at least two lines from the image data but employing as many lines of the image data as possible according to a certain ‘best match’ criterion directly expanding these operations over their ‘widest possible range’ of lines using that ‘best match’ criterion to find within multiple lines common parts of contents, then separating these common parts into a multi line and the residual parts into a single line data domain thus allowing for a separate display of those data domains.

First Claim